Author:Benjamin Semal

Publications
Leaky Controller: Cross-VM Memory Controller Covert Channel on Multi-Core Systems Benjamin Semal, Konstantinos Markantonakis, Raja Naeem Akram and Jan Kalbantner EasyChair Preprint 2941

Keyphrases

Channel Attack, channel capacity, channel scheduler, controller channel scheduler, covert channel, Covert Channel Attack, Cross-VM, DRAM, dram addressing function, DRAM bank, DRAM row buffer, Ivy Bridge, leaky controller, memory access, Memory Controller, memory controller channel, Microarchitectural attack, microarchitectural covert channel attack, physical address, privileged covert channel, raw bit rate, Row Buffer, timing channel, Timing variation, uncached memory access, Virtualized Environment, vm covert channel.