Internally Generated Scan Resets Using OCC

EasyChair Preprint 15172

Abstract

Traditional approaches for providing scan reset can lead to certain limitations in the face of limited IOs and limited ATE resources. Together these can cause coverage limitations, pattern inefficiency, or even unreliable patterns. So, to overcome these limitations, a DfT architecture is defined which generates scan reset internally using OCC.

Keyphrases: DFT Architecture, Hierarchical compatible Test, Internal Scan Resets, Low Pin Test, Retention flipflop, capture window, clock pad, enable to block, mini-OCC, provide internal scan reset, race conditions, reset n and retain, reset n clk, reset occ, retention control, scan clock, scan data bandwidth, scan enable, scan reset pulse, scan resets, standard dft instrumentation

@booklet{EasyChair:15172,
  author    = {Dan Jacobs and Vinod Naik},
  title     = {Internally Generated Scan Resets Using OCC},
  howpublished = {EasyChair Preprint 15172},
  year      = {EasyChair, 2024}}